PoS - Proceedings of Science
Volume 282 - 38th International Conference on High Energy Physics (ICHEP2016) - Detector: R&D and Performance
The Silicon Vertex Detector of the Belle II Experiment
A. Paladino,* K. Adamczyk, H. Aihara, C. Angelini, T. Aziz, V. Babu, S. Bacher, S. Bahinipati, E. Barberio, T. Baroncelli, T. Baroncelli, A.K. Basith, G. Batignani, A. Bauer, P.K. Behera, T. Bergauer, S. Bettarini, B. Bhuyan, T. Bilka, F. Bosi, L. Bosisio, A. Bozek, F. Buchsteiner, L. Bulla, G. Casarosa, M. Ceccanti, D. Cervenkov, S.R. Chendvankar, N. Dash, G. De Pietro, S.T. Divekar, Z. Doležal, D. Dutta, F. Forti, M. Friedl, K. Hara, T. Higuchi, T. Horiguchi, C. Irmler, A. Ishikawa, H.B. Jeon, C. Joo, J. Kandra, K.H. Kang, E. Kato, T. Kawasaki, P. Kodyš, T. Kohriki, S. Koike, M.M. Kolwalkar, P. Kvasnicka, L. Lanceri, J. Lettenbicher, T. Lueck, M. Maki, P. Mammini, S.N. Mayekar, G.B. Mohanty, S. Mohanty, T. Morii, K.R. Nakamura, Z. Natkaniec, K. Negishi, N.K. Nisar, Y. Onuki, W. Ostrowicz, E. Paoloni, H. Park, F. Pilo, A. Profeti, K.K. Rao, I. Rashevskaia, G. Rizzo, M. Rozanska, J. Sasaki, N. Sato, S. Schultschik, C. Schwanda, Y. Seino, N. Shimizu, J. Stypula, J. Suzuki, S. Tanaka, K. Tanida, G.N. Taylor, R. Thalmeier, R. Thomas, T. Tsuboyama, S. Uozumi, P. Urquijo, L. Vitale, S. Watanuki, I.J. Watson, J. Webb, J. Wiechczynski, S. Williams, B. Würkner, H. Yamamoto, H. Yin, T. Yoshinobu, L. Zani On behalf of the BELLE II SVD collaboration
*corresponding author
Full text: pdf
Pre-published on: February 06, 2017
Published on: April 19, 2017
The Belle II experiment at the SuperKEKB flavour factory will operate at an unprecedented lu- minosity of 8×10^35cm−2s−1, which is about 40 times larger than its predecessor KEKB. The VerteX Detector is composed of a two-layer DEPFET PiXel Detector (PXD) and a four-layer double sided silicon strip detector (SVD). To achieve a precise vertex position determination and an excellent low-momentum tracking, even under the high background and high trigger rate of 10kHz, the SVD employs several innovative techniques. In order to reduce the occupancy and to minimise the parasitic capacitance in the signal path, 1748 APV25 ASIC chips, which read-out signals from 224k strip channels, are directly mounted on the ladders with the novel Origami concept. The analog signals from APV25 are digitised by an FADC system and sent to the central DAQ. An online tracking system based on SVD hits provides the Regions Of Interests to PXD in order to reduce the data size to achieve the required bandwidth and data storage space. In this talk, we present the design principles and construction status of the Belle II SVD, together with preliminary results on sensors performances.
DOI: https://doi.org/10.22323/1.282.0248
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