PoS - Proceedings of Science
Volume 287 - The 25th International workshop on vertex detectors (Vertex 2016) - Session: Vertexing at future accelerators
Silicon pixel R&D for the CLIC detector
D. Hynds* and  On behalf of the CLICdp collaboration
Full text: pdf
Pre-published on: March 09, 2017
Published on: August 03, 2017
The physics aims at the future CLIC high-energy linear e+e− collider set very high precision requirements on the performance of the vertex and tracking detectors. Moreover, these detectors have to be well adapted to the experimental conditions, such as the time structure of the collisions and the presence of beam-induced backgrounds. The main challenges are: a point resolution of a few microns, ultra-low mass (~0.2% X0 per layer for the vertex region and ~1% X0 per layer for the outer tracker), very low power dissipation (compatible with air-flow cooling in the inner vertex region) and pulsed power operation, complemented with ~10 ns time stamping capabilities. A highly granular all-silicon vertex and tracking detector system is under development, following an integrated approach addressing simultaneously the physics requirements and engineering constraints. For the vertex-detector region, hybrid pixel detectors with small pitch (25 μm) and analogue readout are explored. For the outer tracking region, both hybrid concepts and fully integrated CMOS sensors are under consideration. The feasibility of ultra-thin sensor layers is validated with Timepix3 readout ASICs bump bonded to active edge planar sensors with 50-150 μm thickness. Prototypes of CLICpix readout ASICs implemented in 65 nm CMOS technology with 25 μm pixel pitch have been produced. Hybridisation concepts have been developed for interconnecting these chips either through capacitive coupling to active HV-CMOS sensors or through bump-bonding to planar sensors. Recent R&D achievements include results from beam tests with all types of hybrid assemblies. Simulations based on Geant4 and TCAD are used to validate the experimental results and to assess and optimise the performance of various detector designs. The R&D project also includes the development of through-silicon via (TSV) technology, as well as various engineering studies involving thin mechanical structures and full-scale air-cooling tests. An overview of the R&D program for silicon detectors at CLIC will be presented.
DOI: https://doi.org/10.22323/1.287.0049
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