PoS - Proceedings of Science
Volume 313 - Topical Workshop on Electronics for Particle Physics (TWEPP-17) - Programmable Logic Design Tools and Methods
Upgrade of the YARR DAQ System for the ATLAS Phase-II Pixel Detector Readout Chip
N.L. Whallon*, T. Heim, M. Garcia-Sciveres, A. Sautaux, H. Oide, K.J. Potamianos and S.C. Hsu
Full text: pdf
Pre-published on: March 05, 2018
Published on: March 20, 2018
Abstract
Yet Another Rapid Readout (YARR) is a DAQ system based on a software driven architecture using PCIe FPGA boards. It was designed for the readout of current generation ATLAS Pixel detector readout chips, which have a readout bandwidth of 160 Mb/s. YARR has been upgraded to accommodate the higher 5 Gb/s bandwidth of the next generation readout chip in development by the RD53 collaboration for the Phase-II upgrade of the ATLAS and CMS detectors. The performance results of the migration to a new PCIe FPGA board, the PLDA XpressK7, will be presented.
DOI: https://doi.org/10.22323/1.313.0076
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