Volume 313 -
Topical Workshop on Electronics for Particle Physics (TWEPP-17) -
Programmable Logic Design Tools and Methods
DRM2: the Readout Board for the ALICE TOF Upgrade
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Pre-published on:
March 05, 2018
Published on:
March 20, 2018
Abstract
For the upgrade of the ALICE TOF electronics, we have designed a new version of the readout board, named DRM2, a card able to read the data coming from the TDC Readout Module boards via VME. A Microsemi Igloo2 FPGA acts as the VME master and interfaces the GBTx link for transmitting data and receiving triggers and a low- jitter clock. Compared to the old board, the DRM2 is able to cope with faster trigger rates and provides a larger data bandwidth towards the DAQ. The results of the measurements on the received clock jitter and data transmission performances in a full crate are given.
DOI: https://doi.org/10.22323/1.313.0081
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Copyright owned by the author(s) under the term of the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.
Copyright owned by the author(s) under the term of the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.