New LpGBT-FPGA IP: Simulation model and first implementation
May 21, 2019
July 25, 2019
High-speed links are commonly used in High Energy Physics experiments for data acquisition, trigger and timing distribution. For this reason, a radiation-hard link is being developed in order to match the increasing bandwidth demand of the backend electronics and computing systems. In this framework, the LpGBT - which is the evolution of the GBTx SERDES - is being designed and is foreseen to be installed in CMS and ATLAS for Phase-2 upgrades. The LpGBT-FPGA IP core is proposed to offer a backend counterpart of the LpGBT. This paper presents the IP architecture, the status of its development and future steps.
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