Machine learning: hit time finding with a neural network
2019 May 21
2019 July 25
At the High Energy Accelerator Research Organization (KEK) in Tsukuba, Japan, the double-sided silicon strip sub-detector of the Belle II experiment is read out by 1748 APV25 chips. FPGAs perform several calculations on the digitized signals. One of them will be "Hit Time Finding": the determination of the time and amplitude of the signal peaks of each event in real time using pre-programmed neural networks. This work analyses the possibility, precision and reliability of these calculations depending on various parameters.