An automated pipeline for continuous integration of FPGA firmware and software for the LHCb Run3 upgrade
June 13, 2019
July 25, 2019
The readout system for the upcoming Run3 upgrade of the LHCb experiment at CERN is based
around a common readout board called PCIe40. By reconfiguring the onboard FPGA with dedicated firmware, this common board can be used to serve very different roles within the upgraded
LHCb experiment. A continuous integration pipeline was implemented in order to automatically
cross-validate the tight interaction between the different FPGA firmwares and the associated DAQ
and control software, all being actively developed in parallel. We present challenges and solutions
for applying this kind of practices, traditionally limited mainly to the field of software engineering,
also to hardware-in-the-loop validation of FPGA firmware and SCADA-based control systems.
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