We report on the development of a front-end ASIC for silicon-strip detectors of the J-PARC Muon
g-2/EDM experiment. This experiment aims to measure the muon anomalous magnetic moment
and electric dipole moment precisely to explore new physics beyond the Standard Model. Since
the time and momentum of positrons from muon decay are key information in the experiment, a
fast response with high granularity is demanded to silicon-strip detectors as the positron tracker.
The readout ASIC is thus required to tolerate a high hit rate of 1.4 MHz per strip and to have
deep memory for the period of 40 us with 5 ns time resolution. To satisfy the experimental
requirements, an analog prototype ASIC was newly designed with the Silterra 180 nm CMOS
technology. In the evaluation test, the time-walk was demonstrated to reach 0.8 ns with a sufficient
dynamic range of 6 MIPs and pulse width of 45 ns for 1 MIP event. The design details and
performance of the ASIC are discussed in this article.