The Concentrator Integrated Circuit (CIC) ASIC is a front-end chip for both Pixel-Strip (PS) and
Strip-Strip (2S) modules of the future Phase-II CMS Outer Tracker upgrade at the HighLuminosity LHC (HL-LHC). It collects the digital data coming from eight upstream front-end
chips (either MPAs or CBCs, depending on the module type), formats the signal in data packets
containing the trigger information from eight bunch crossings and the raw data from events
passing the first trigger level, and finally transmits them to the LpGBT unit. The design and its
implementation in a 65 nm CMOS technology of the first prototype that integrates all
functionalities for system level operation are presented in this contribution.
A 65 nm Data Concentration ASIC for the CMS Outer Tracker Detector Upgrade at HL-LHC
Full text:
pdf
Pre-published on:
May 21, 2019
Published on:
July 25, 2019
Abstract
DOI: https://doi.org/10.22323/1.343.0099
How to cite
Metadata are provided both in "article" format (very similar to INSPIRE) as this helps creating very compact bibliographies which can be beneficial to authors and readers, and in "proceeding" format which is more detailed and complete.
Open Access
Copyright owned by the author(s) under the term of the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.
Copyright owned by the author(s) under the term of the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.