A 65 nm Data Concentration ASIC for the CMS Outer Tracker Detector Upgrade at HL-LHC
May 21, 2019
July 25, 2019
The Concentrator Integrated Circuit (CIC) ASIC is a front-end chip for both Pixel-Strip (PS) and
Strip-Strip (2S) modules of the future Phase-II CMS Outer Tracker upgrade at the HighLuminosity LHC (HL-LHC). It collects the digital data coming from eight upstream front-end
chips (either MPAs or CBCs, depending on the module type), formats the signal in data packets
containing the trigger information from eight bunch crossings and the raw data from events
passing the first trigger level, and finally transmits them to the LpGBT unit. The design and its
implementation in a 65 nm CMOS technology of the first prototype that integrates all
functionalities for system level operation are presented in this contribution.
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