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Volume 343 - Topical Workshop on Electronics for Particle Physics (TWEPP2018) - Trigger
ALICE trigger system for LHC Run 3
M. Krivda,* D. Evans, A. Jusko, J. Kvapil, R. Lietava, O.V. Baillie, E.J. Willsher, I. Kralik, M. Bombara, L. Tropp, L.A. Pérez Moreno
*corresponding author
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Pre-published on: 2019 July 03
Published on: 2019 July 25
The ALICE Central Trigger System (CTS) will be upgraded for LHC Run 3 with a completely
new hardware and a new Trigger and Timing System (TTS) based on a Passive Optical Network (PON)
system. A new universal trigger board was designed that can function as a Central Trigger Processor (CTP)
or as a Local Trigger Unit (LTU). It is based on the Xilinx Kintex Ultrascale FPGA and upgraded TTCPON. The new trigger system and the results of the tests and verification of the first 23 boards, produced at
the beginning of 2018, will be presented.
Open Access
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