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Volume 343 - Topical Workshop on Electronics for Particle Physics (TWEPP2018) - Radiation Tolerant Components and Systems
Radiation hardness test of the nSYNC ASIC with 60 MeV proton beam
D. Brundu,* S. Cadeddu, A. Cardini, L. Casu
*corresponding author
Full text: pdf
Pre-published on: 2019 May 21
Published on: 2019 July 25
The nSYNC chip is a radiation tolerant custom ASIC, developed in UMC 130 nm technology
for the upgrade of the readout electronics of the LHCb Muon System. The chip will work, over
ten years of upgrade operation, in a radioactive environment and exposed to a total dose of 13
krad and a fluence of 2 · 10$^{12}$ cm$^{-2}$ 1-MeV neutrons equivalent. The results of radiation tests
performed at the Catana facility (INFN - Laboratori Nazionali del Sud) with 60 MeV proton
beam are discussed, with a particular focus on the internal logic and TDC performance, and
Single Event Effects measurements
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