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Volume 363 - 37th International Symposium on Lattice Field Theory (LATTICE2019) - Main session
Lattice QCD on a novel vector architecture
B. Huth, N. Meyer, T. Wettig*
*corresponding author
Full text: pdf
Pre-published on: 2020 January 22
Published on:
Abstract
The SX-Aurora TSUBASA PCIe accelerator card is the newest model of NEC's SX architecture family. Its multi-core vector processor features a vector length of 16 kbits and interfaces with up to 48 GB of HBM2 memory in the current models, available since 2018. The compute performance is up to 2.45 TFlop/s peak in double precision, and the memory throughput is up to 1.2 TB/s peak. New models with improved performance characteristics are announced for the near future. In this contribution we discuss key aspects of the SX-Aurora and describe how we enabled the architecture in the Grid Lattice QCD framework.

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