TWEPP2019 - (other twepp conferences)
2-6 September 2019
Santiago de Compostela - Spain
published April 21, 2020
Santiago de Compostela - Spain
published April 21, 2020
The purpose of the workshop is:
- Present original concepts and results of research and development for electronics relevant to particle physics experiments as well as accelerator and beam instrumentation at future facilities;
- Review the status of electronics for running experiments and accelerators;
- Identify and encourage common efforts for the development of electronics;
- Promote information exchange and collaboration in the relevant engineering and physics communities.
Workshop topics:
- Highly integrated detectors and electronics
- Custom Analogue and Digital Circuits
- Programmable Digital Logic Applications
- Optoelectronic Data Transfer and Control
- Packaging and Interconnect Technologies
- Radiation and Magnetic Tolerant Systems
- Testing and Reliability
- Power Management and Conversion
- Grounding and Shielding
- Design Tools and Methods
Editorial Board
- Alexander Kluge
European Organization for Nuclear Research (CERN)
| Asic |
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CATIA: APD readout ASIC for the CMS phase 2 ECAL electronics upgrade
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Design and test of current-mode DACs for threshold tuning of front-end channels for the High Luminosity LHC
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A Fault-tolerance Readout Network for High-Density Electrode Array Targeting Neutrinoless Double-Beta Decay Search in TPC
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Simulation of new charge summing and hit allocation algorithm
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ATLASpix3 : A high voltage CMOS sensor chip designed for ATLAS Inner Tracker
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A low-power mixed-signal ASIC for readout of SiPM at cryogenic temperature
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Study of a Triggered, Full Event Zero-Suppressed Front-End Readout Chain operating up to 1 MHz Trigger Rate and Pileup of 300 for CMS Outer Tracker upgrade at HL-LHC
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A CANopen based prototype chip for the Detector Control System of the ATLAS ITk Pixel Detector
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Low-power SEE hardening techniques and error rate evaluation in 65nm readout ASICs
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A SiPM Readout Front-end with Fast Pulse Generation and Successive-Approximation Register ADC
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A Monitoring 12-bits Fully Differential Second Order Incremental Delta Sigma Converter ADC for TimePIx4
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Analog front-end characterization of the RD53A chip
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The first ASIC prototype of a 28 nm time-space front-end electronics for real-time tracking
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FAST: a 30 ps time resolution front-end ASIC for a 4D tracking system based on Ultra-Fast Silicon Detectors
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VMM3a: an ASIC for tracking detectors
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Continuous Integration of FPGA Designs for CMS
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The lpGBTIA, a 2.5 Gbps Radiation-Tolerant Optical Receiver using InGaAs photodetector
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The lpGBT PLL and CDR Architecture, Performance and SEE Robustness
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CLICTD: A monolithic HR-CMOS sensor chip for the CLIC silicon tracker
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DECAL: A Reconfigurable Monolithic Active Pixel Sensor for use in Calorimetry and Tracking
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ALTIROC1, a 25 pico-second time resolution ASIC for the ATLAS High Granularity Timing Detector (HGTD)
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Development of RD50-MPW2: a high-speed monolithic HV-CMOS prototype chip within the CERN-RD50 collaboration
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A Clock and Data Recovery Circuit for the ALTAS/CMS HL-LHC Pixel Front End Chip in 65 nm CMOS Technology
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A 4-Channel 10-Gbps/ch CMOS VCSEL Array Driver with on-chip Charge Pumps
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LAUROC1 : Liquid Argon Upgrade Read Out Chip
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| Optoelectronics and Links |
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Key Building Block Optimization for High- Performance Transceivers: Multimode Interferometers from Conventional to Sub- Wavelength Regime
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First 10Gb/s Transmission with radiation-hardened Silicon Photonic Mach-Zehnder Modulators in a Full Transmission System
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Readout and Trigger Electronics for the Triple-GEM Detectors of the CMS GE2/1 System
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Versatile Link+ Transceiver Production Readiness
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A Precision Pure Clock Distribution System
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TCLink: A Timing Compensated High-Speed Optical Link for the HL-LHC experiments
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| Packaging and Interconnects |
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Development of an Optical Readout Hybrid for the CMS Outer Tracker Upgrade
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Power hybrids for silicon modules with macro-pixel and strip sensors for the CMS Phase-2 tracker upgrade
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Prototyping of Hybrid Circuits for the CMS Phase-2 Outer Tracker Upgrade at the HL-LHC
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| Power, Grounding and Shielding |
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Upgrade of the ATLAS Tile Calorimeter High Voltage System
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The powering concept of the Silicon Tracking System for CBM@FAIR
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RD53A chip susceptibility to electromagnetic conducted noise
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Powering of the CMS Phase-2 Upgraded Tracker
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Stabilization and Protection of the Shunt-LDO regulator for the HL-LHC pixel detector upgrades
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63U ATCA rack thermal performance and its integration in the undergound areas
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The bPOL12V DCDC converter for HL-LHC trackers: towards production readiness
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2.5V step-down DCDCs: a radiation-hard solution for power conversion
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| Production, Testing and Reliability |
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Automated assembly of large double-sided microstrip detectors of the CBM Silicon Tracking System at FAIR
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KARATE - a setup for high rate tests on the CMS Outer Tracker 2S module readout chain
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Production, Quality Control and Performance of VFAT3 Front-end Hybrids for the CMS GE1/1 Upgrade
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The Engineering, Production and Quality Assurance of the Inner Barrel Staves for the Upgrade of the ALICE Inner Tracking System
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A High Throughput Production Scale Front-End Hybrid Test System for the CMS Phase-2 Tracker Upgrade
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| Programmable Logic, Design Tools and Methods |
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Implementation of a CANbus interface for the Detector Control System in the ALICE ITS Upgrade
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Throttling Studies for the CBM Self-triggered Readout
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Readiness of the ATLAS Tile Calorimeter link daughterboard for the High Luminosity LHC era
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Development of Readout Electronics for a Digital Tracking Calorimeter
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Development of the Compact Processing Module for the ATLAS Tile Calorimeter Phase-II Upgrade
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Multi-channel time-tagging module for fast-timing Resistive Plate Chamber detectors
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Highly-linear FPGA-based Data Acquisition System for Multi-channel SiPM Readout
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| Systems, Planning, Installation, Commissioning and Running Experience |
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MARTA’s (Muon Array with RPC for Tagging Air showers) DAQ system
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Hardware production quality control for the ATLAS Phase-I readout upgrade
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Caribou – A versatile data acquisition system
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Back-end firmware for the LHCb VELO upgrade phase I
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First results from the CIC data aggregation ASIC for the Phase 2 CMS Outer Tracker
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New Quench Detection System to Enhance Protection of the Individually Powered Magnets in the Large Hadron Collider
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Test results of a Flexible Printed Circuit for the ATLAS High Granularity Timing Detector
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Commissioning High-speed readout for the LHCb VELO Upgrade
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High-Precision Luminosity Instrumentation for the CMS Experiment at the HL-LHC
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First measurements with the CMS DAQ and Timing Hub prototype-1
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The upgraded readout electronics of the CMS ECAL: system overview
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Integration, Commissioning and First Experience of ALICE ITS Control and Readout Electronics
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First lpGBT-based prototype of the End-of-Substructure (EoS) card for the ATLAS Strip Tracker Upgrade
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The OBDT board: A prototype for the Phase 2 Drift Tubes on detector electronics
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A Muon Telescope as Demonstrator of the JUNO Top Tracker Detector
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Electronics System of the CMS GE1/1 Muon Upgrade and Lessons Learned From the Slice Test During the 2017-2018 LHC Runs
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The Digitizer ReAdout Controller (DIRAC) of the Mu2e electromagnetic calorimeter at Fermilab
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The APOLLO ATCA Platform
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Module and System Test Development for the Phase-2 ATLAS ITk Pixel Upgrade
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| Radiation Tolerant Components and Systems |
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Study of SEU effects in circuits developed in 110 nm CMOS technology
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Design of a 4 ps radiation hardened TDC with an improved interpolation technique
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Design of Finite State Machines for SRAM-based FPGAs operated in radiation field
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Triple-Modular Redundancy Deployment Optimization in the Sensor Readout System of the CBM Micro Vertex Detector
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External scrubber implementation for the ALICE ITS Readout Unit
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Increased radiation tolerance of CMOS sensors with small collection electrodes through accelerated charge collection
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| Trigger |
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ATLAS Level-0 Endcap Muon Trigger for HL-LHC
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Hardware Demonstrator Of The Phase-II ATLAS MDT Trigger Processor
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Triggering on electrons, photons, tau leptons, jets and energy sums with the CMS Level-1 trigger
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Realization of a state machine based detection for Track Segments in the Trigger System of the Belle II Experiment
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Upgrade of the ATLAS MDT Readout and Trigger for the HL-LHC
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Overview of the HL-LHC Upgrade for the CMS Level-1 Trigger
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FPGA implementation of a histogram-based parent bunch-crossing identification for the Drift Tubes chambers of the CMS experiment
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| Other |
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A multi-channel trigger and acquisition board for TDC-based readout: application to the cosmic rays detector of the PolarQuEEEst 2018 project.
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