PoS - Proceedings of Science
Volume 370 - Topical Workshop on Electronics for Particle Physics (TWEPP2019) - Asic
FAST: a 30 ps time resolution front-end ASIC for a 4D tracking system based on Ultra-Fast Silicon Detectors
F. Fausti,* J. Olave, N. Cartiglia
*corresponding author
Full text: pdf
Pre-published on: March 06, 2020
Published on: April 21, 2020
The UFSD group of Turin is working on developing custom front-end electronics for the read-out of thin silicon sensors with moderate internal gain, the so called Ultra-Fast Silicon Detectors- UFSD, aiming at applications that require very precise time tagging. The activity of the group is mainly focused on meeting the requirements of the next generation of High Energy Physics (HEP) colliders where time tagging is a fundamental tool that can be exploited to distinguish events overlapping in space but separated in time by a few tens of pico-seconds. FAST, a 20 channels low power ASIC is presented in this paper. This prototype has been designed to reach a 30 ps time resolution when coupled to UFSD. To investigate the best ASIC architecture, three different design solutions of FAST has been developed with variations regarding the amplification stages and component-level technical choices
DOI: https://doi.org/10.22323/1.370.0023
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