PoS - Proceedings of Science
Volume 370 - Topical Workshop on Electronics for Particle Physics (TWEPP2019) - Asic
A 4-Channel 10-Gbps/ch CMOS VCSEL Array Driver with on-chip Charge Pumps
J. Ye,* X. Huang, D. Gong, Q. Sun, C. Chen, D. Guo, S. Hou, G. Huang, S. Kulis, C. Liu, T.C. Liu, P. Moreira, A. Sánchez Rodríguez, H. Sun, J. Troska, L. Xiao, L. Zhang, W. Zhang
*corresponding author
Full text: pdf
Pre-published on: March 06, 2020
Published on: April 21, 2020
Abstract
We present the design and test results of a 4-channel 10-Gbps/ch Vertical-Cavity Surface-Emitting Laser array driver, the cpVLAD. With on-chip charge-pumps to extend the biasing headroom for the VCSELs needed for low temperature operation and mitigation of the radiation effects. The cpVLAD was fabricated in a 65-nm CMOS technology. The test results show that the cpVLAD is capable of driving VCSELs with forward bias voltages as high as 2.8 V from a 2.5 V power supply. The power consumption of the cpVLAD is 94 mW/ch.
DOI: https://doi.org/10.22323/1.370.0048
How to cite

Metadata are provided both in "article" format (very similar to INSPIRE) as this helps creating very compact bibliographies which can be beneficial to authors and readers, and in "proceeding" format which is more detailed and complete.

Open Access
Creative Commons LicenseCopyright owned by the author(s) under the term of the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.