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Volume 370 - Topical Workshop on Electronics for Particle Physics (TWEPP2019) - Asic
A 4-Channel 10-Gbps/ch CMOS VCSEL Array Driver with on-chip Charge Pumps
J. Ye,* X. Huang, D. Gong, Q. Sun, C. Chen, D. Guo, S. Hou, G. Huang, S. Kulis, C. Liu, T.C. Liu, P. Moreira, A. Sánchez Rodríguez, H. Sun, J. Troska, L. Xiao, L. Zhang, W. Zhang
*corresponding author
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Pre-published on: 2020 March 06
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We present the design and test results of a 4-channel 10-Gbps/ch Vertical-Cavity Surface-Emitting Laser array driver, the cpVLAD. With on-chip charge-pumps to extend the biasing headroom for the VCSELs needed for low temperature operation and mitigation of the radiation effects. The cpVLAD was fabricated in a 65-nm CMOS technology. The test results show that the cpVLAD is capable of driving VCSELs with forward bias voltages as high as 2.8 V from a 2.5 V power supply. The power consumption of the cpVLAD is 94 mW/ch.
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