PoS - Proceedings of Science
Volume 370 - Topical Workshop on Electronics for Particle Physics (TWEPP2019) - Trigger
FPGA implementation of a histogram-based parent bunch-crossing identification for the Drift Tubes chambers of the CMS experiment
N. Pozzobon,* F. Montecassiano, P. Zotto on behalf of the CMS collaboration
*corresponding author
Full text: pdf
Pre-published on: March 25, 2020
Published on: April 21, 2020
The first running implementation on FPGA of a histogram-based trigger primitive generator for the CMS Drift Tubes at the High Luminosity LHC is presented. The foreseen architecture requires that raw charge collection times, measured for each tube by means of a TDC, are processed in the back-end to generate trigger primitives, identifying the parent bunch crossing and measuring the track parameters. We review the design of a parent bunch crossing evaluation, its implementation on FPGAs of the Xilinx UltraScale family by means of High-Level Synthesis, and the performance of a demonstrator board of such a trigger.
DOI: https://doi.org/10.22323/1.370.0149
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