This work discusses the design and the main results relevant to the characterization of analog front-end processors in view of their operation in the pixel detector readout chips of ATLAS and CMS at the High-Luminosity LHC. The front-end channels presented in this paper are part of RD53A, a large scale demonstrator designed in a 65 nm CMOS technology by the RD53 collaboration.
The collaboration is now developing the full-sized readout chips for the actual experiments. Some details on the improvements implemented in the analog front-ends are provided in the paper.
Volume 373 -
The 28th International Workshop on Vertex Detectors (Vertex2019) -
Sensor/Asic technology
RD53 analog front-end processors for the ATLAS and CMS experiments at the High-Luminosity LHC
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Pre-published on:
April 20, 2020
Published on:
September 14, 2020
Abstract
DOI: https://doi.org/10.22323/1.373.0021
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Copyright owned by the author(s) under the term of the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.
Copyright owned by the author(s) under the term of the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.