The RD53 collaboration is developing a large scale pixel front-end chip, which will be a tool to
evaluate the performance of 65 nm CMOS technology in view of its application to the readout
of the innermost detector layers of ATLAS and CMS at the HL-LHC. Experimental results of
the characterization of small prototypes will be discussed in the frame of the design work that is
currently leading to the development of the large scale demonstrator chip RD53A to be submitted
in early 2017. The paper is focused on the analog processors developed in the framework of the
RD53 collaboration, including three time over threshold front-ends, designed by INFN Torino
and Pavia, University of Bergamo and LBNL and a zero dead time front-end based on flash ADC
designed by a joint collaboration between the Fermilab and INFN. The paper will also discuss the
radiation tolerance features of the front-end channels, which were exposed to up to 800 Mrad of
total ionizing dose to reproduce the system operation in the actual experiment.