PoS - Proceedings of Science
Volume 370 - Topical Workshop on Electronics for Particle Physics (TWEPP2019) - Programmable Logic, Design Tools and Methods
Highly-linear FPGA-based Data Acquisition System for Multi-channel SiPM Readout
T. Townsend,* Y. Tang, J. Chen
*corresponding author
Full text: pdf
Pre-published on: March 09, 2020
Published on: April 21, 2020
A 32-channel, 15 ps resolution, Kintex 7 FPGA-based data acquisition (DAQ) system for time-of-flight (TOF) and time-over-threshold (TOT) SiPM readout is demonstrated along with a comparison to previous works. Focusing on modern FPGA concerns such as clock skew and bin realignment, the implementation difficulties of FPGA-based TDCs are discussed including bubble error, zero length bins, inter-clock region nonlinearity, and chain overflow. Linearity of the TDC is improved by multichain averaging with comparison of 1, 2, and 4 chains pre and post-calibration. Measurement results of the proposed TDC include 11 ps mean bin size, a differential nonlinearity (DNL) of less than 4 ps, and an integral nonlinearity (INL) of less than 10 ps.
DOI: https://doi.org/10.22323/1.370.0094
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