Test results of a Flexible Printed Circuit for the ATLAS High Granularity Timing Detector
M. Robles Manzano*, P. Bernhard, A. Brogna, F. Greiner, A. Kurt, L. Masetti, P. Plattner on behalf of the HGTD community and Q. Weitzel
March 06, 2020
April 21, 2020
The compact structure of the HGTD proposed for the High Luminosity ATLAS detector upgrade at the CERN LHC requires a design to match the tight mechanical and electrical constraints. Our proposal based on a flexible printed circuit manages the signals to read out and control the modules, to bias the sensors with high voltage and to power the ASIC. Because of the high speed serial link, it is crucial to match the characteristic impedance of the lines. The high voltage bias requires clearance and shielding to limit the interference with the digital logic. We present results of the geometrical and electrical tests performed on the first version of the prototype.
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