Integration, Commissioning and First Experience of ALICE ITS Control and Readout Electronics
A. Velure* on behalf of the ALICE collaboration
Pre-published on:
March 06, 2020
Published on:
April 21, 2020
Abstract
For the third running period of the CERN LHC, the ALICE experiment will undertake several upgrades of its sub-detectors. One of the detectors to be upgraded is the Inner Tracking System, featuring the new ALPIDE pixel chip. Control and readout of the 24120 chips are handled by 192 custom FPGA-based readout units. Each readout unit can forward 9.6 Gbps of data to another custom PCIe card that aggregates the data from several units and transmits it for further offline/online analysis. Integration and commissioning of the system is underway and this paper describes the first experiences and results of this effort.
DOI: https://doi.org/10.22323/1.370.0113
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