This work is concerned with the design and characterization of an SLVS transmitter/receiver pair,
to be used for I/O links in High Energy Physics applications. Core transistors with a power
supply of 1.2 V have been considered in the design in order to mitigate the TID effects, due to
the harsh radiation environment foreseen. The circuits have been implemented in a 65 nm CMOS
technology. The prototype chip was designed and fabricated in the framework of the RD53 project
and was completely characterized in the first quarter of 2016. The chip has been also irradiated
with X-rays in order to evaluate the effect of the ionizing radiation on the signal integrity
Characterization of SLVS Driver and Receiver in a 65 nm CMOS Technology for High Energy Physics Applications
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Pre-published on:
March 05, 2018
Published on:
March 20, 2018
Abstract
DOI: https://doi.org/10.22323/1.313.0014
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Copyright owned by the author(s) under the term of the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.
Copyright owned by the author(s) under the term of the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.