Volume 370 - Topical Workshop on Electronics for Particle Physics (TWEPP2019) - Asic
Design and test of current-mode DACs for threshold tuning of front-end channels for the High Luminosity LHC
L. Gaioni,* M. Manghisoni, L. Ratti, V. Re, G. Traversi
*corresponding author
Full text: pdf
Pre-published on: March 06, 2020
Published on: April 21, 2020
Abstract
This work is concerned with the design and the characterization of digital-to-analog current converters, developed in a 65 nm CMOS technology, conceived for threshold tuning of front-end
channels at the High-Luminosity LHC experiment upgrades. Two DAC structures were integrated in a small prototype chip, that was submitted in August 2018 in the framework of the RD53 developments. The prototype has been tested before and after exposure to X-rays up to a TID of 460 Mrad($SiO_2$). The main performance parameters of the two structures are compared and discussed in the paper.
DOI: https://doi.org/10.22323/1.370.0002
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