PoS - Proceedings of Science
Volume 370 - Topical Workshop on Electronics for Particle Physics (TWEPP2019) - Asic
Continuous Integration of FPGA Designs for CMS
R. Glein*, A. Perloff and K. Ulmer
Full text: pdf
Pre-published on: March 06, 2020
Published on: April 21, 2020
Abstract
Due to the high degree of flexibility when designing firmware for FPGAs, the build process and the designs themselves are vulnerable to errors. Continuous integration is a fast way to detect a majority of such errors. Additionally, simulations – using test methodologies for testbenches such as unit tests – and hardware tests can be automated. Continuous integration offers the benefits of reproducible results, reliable error detection, error tracing, avoiding human errors in the build process, and minimizing the manual verification of the firmware. Such an extensive and automated development procedure requires a slight increase in setup time and the need to use a comprehensive integration tool, such as the GitLab’s CI/CD tools.
DOI: https://doi.org/10.22323/1.370.0028
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