The High Luminosity era will present a challenge in terms of the number of simultaneous inter-
actions (pile-up) to the Large Hadron Collider experiments. In order to mitigate the detrimental
effect of the pile-up on physics performance, ATLAS will install a High Granularity Timing
Detector (HGTD) that will provide a time resolution per track of 50 ps during its lifetime. HGTD
consists of hybrid silicon devices with Low Gain Avalanche Detectors as the sensing medium.
The LGADs are segmented into a matrix of 15 × 15 with 1.3 × 1.3 𝑚𝑚2 pads. The sensors
are bump-bonded to the readout ASIC (ALTIROC), producing the HGTD hybrid. Two hybrids
are joined by a single flexible PCB, defining the HGTD module. In this work, we discuss the
hybridization process and its quality control, as well as the studies carried out to ensure that the
timing performance of the chip is not affected by the bump-bonding process. This document also
presents the assembly procedure, the electrical tests and the thermal cycling studies conducted on
the initial module prototypes.