ALICE trigger system for LHC Run 3
M. Krivda*,
D. Evans,
A. Jusko,
J. Kvapil,
R. Lietava,
O.V. Baillie,
E.J. Willsher,
I. Kralik,
M. Bombara,
L. Tropp and
L.A. Pérez Moreno*: corresponding author
Pre-published on:
July 03, 2019
Published on:
July 25, 2019
Abstract
The ALICE Central Trigger System (CTS) will be upgraded for LHC Run 3 with a completely
new hardware and a new Trigger and Timing System (TTS) based on a Passive Optical Network (PON)
system. A new universal trigger board was designed that can function as a Central Trigger Processor (CTP)
or as a Local Trigger Unit (LTU). It is based on the Xilinx Kintex Ultrascale FPGA and upgraded TTCPON. The new trigger system and the results of the tests and verification of the first 23 boards, produced at
the beginning of 2018, will be presented.
DOI: https://doi.org/10.22323/1.343.0119
How to cite
Metadata are provided both in
article format (very
similar to INSPIRE)
as this helps creating very compact bibliographies which
can be beneficial to authors and readers, and in
proceeding format which
is more detailed and complete.