The workshop will cover all aspects of electronics for particle physics experiments, and accelerator instrumentation of general interest to users.
LHC experiments (and their operational experience) will remain a focus of the meeting but a strong emphasis on R&D for future experimentation will be maintained, such as SLHC, CLIC, ILC, neutrino facilities as well as other particle and astroparticle physics experiments.
The purpose of the workshop is:
Posters |
Front-end Electronics of the Forward Strip Detector for the ATLAS HL-LHC Upgrade PoS(TWEPP2018)014 pdf |
First Double-Sided End-Cap Strip Module for the ATLAS High-Luminosity Upgrade PoS(TWEPP2018)015 pdf |
Automated Test Station for the Characterization of Custom Silicon PhotoMultipliers for the Mu2e Calorimeter PoS(TWEPP2018)017 pdf |
Front-end hybrids for the strip-strip modules of the CMS Outer Tracker Upgrade PoS(TWEPP2018)019 pdf |
A bipolar shaping amplifier for low background alpha/beta counters with silicon detectors. PoS(TWEPP2018)021 pdf |
A 1 GS/s sampling digitizer designed with interleaved architecture (GSPS) for the LaBr3 detectors of the FAMU experiment PoS(TWEPP2018)022 pdf |
Investigation of Single Event Latch-up effects in the ALICE SAMPA ASIC PoS(TWEPP2018)023 pdf |
ATLAS Tile Calorimeter Link Daughterboard PoS(TWEPP2018)024 pdf |
Radiation tests and production test strategy for the ALICE TOF readout upgrade board PoS(TWEPP2018)025 pdf |
Radiation tolerant conditioning electronics for vacuum measurements PoS(TWEPP2018)026 pdf |
A Delay Locked Loop for Time-to-Digital Converters with Quick Recovery and Low Hysteresis PoS(TWEPP2018)027 pdf |
The Upgraded Microstrip Silicon Sensor Characterisation Facility of the University of Sheffield PoS(TWEPP2018)028 pdf |
Characterization of Soft Error Rate Against Memory Elements Spacing and Clock Skew in a Logic with Triple Modular Redundancy in a 65nm Process PoS(TWEPP2018)029 pdf |
High-Voltage Silicon JFET for HV Multiplexing for the ATLAS MicroStrip Staves PoS(TWEPP2018)030 pdf |
Hybrid GaN and CMOS Integrated Module Radiation Hard DC-to-DC Converter PoS(TWEPP2018)031 pdf |
Flexible Printed Circuit design and testing for the High-Granularity Timing Detector for the Phase II upgrade of the ATLAS calorimeter system PoS(TWEPP2018)032 pdf |
The Embedded Local Monitor Board upgrade proposals PoS(TWEPP2018)034 pdf |
Electronics Developments for Phase-2 Upgrade of CMS Drift Tubes PoS(TWEPP2018)035 pdf |
New 63U ATCA rack: thermal performances and integration challenge PoS(TWEPP2018)037 pdf |
CMS Drift Tubes Readout Phase 1 Upgrade PoS(TWEPP2018)039 pdf |
CMS ECAL Upgrade Front End card: design and prototype test results PoS(TWEPP2018)044 pdf |
Novel P-in-N Si-Sensor technology for high resolution and high repetition-rate experiments at accelerator facilities PoS(TWEPP2018)045 pdf |
ATLAS Phase-II-Upgrade Pixel Demonstrator Read-out PoS(TWEPP2018)046 pdf |
The CMS Level-1 muon trigger for the LHC Run II PoS(TWEPP2018)049 pdf |
A Lightweight First-Level Muon Track Trigger for Future Hadron Collider Experiments PoS(TWEPP2018)051 pdf |
New development in the CMS ECAL Level-1 trigger system to meet the challenges of LHC Run 2 PoS(TWEPP2018)052 pdf |
Study of Track Reconstruction using Retina algorithm for charged particles in magnetic field PoS(TWEPP2018)053 pdf |
Input Mezzanine Board for the Fast Tracker(FTK) at ATLAS PoS(TWEPP2018)055 pdf |
Concept, design and verification of components for an integrated on-detector silicon photonic multichannel transmitter PoS(TWEPP2018)057 pdf |
New LpGBT-FPGA IP: Simulation model and first implementation PoS(TWEPP2018)059 pdf |
Thermal Characterisation of the Versatile Link+ Transceiver PoS(TWEPP2018)060 pdf |
A possible implementation of a detector specific extension of the FELIX firmware for the ITk Pixel sub-detector PoS(TWEPP2018)064 pdf |
Machine learning: hit time finding with a neural network PoS(TWEPP2018)065 pdf |
FPGA Implementation of an Artificial Neural Network for Subatomic Physics Experiment Particles Recognition PoS(TWEPP2018)066 pdf |
GBT oriented firmware for Data Processing Boards for CBM PoS(TWEPP2018)067 pdf |
Ethernet-based slow control system for parallel configuration of FPGA-based front-end boards PoS(TWEPP2018)068 pdf |
An automated pipeline for continuous integration of FPGA firmware and software for the LHCb Run3 upgrade PoS(TWEPP2018)069 pdf |
Remote Control Unit of the LHC Injector Complex Beam Loss Monitoring System PoS(TWEPP2018)070 pdf |
ABACUS : Two fast amplifiers for the readout of LGAD detectors PoS(TWEPP2018)071 pdf |
Design of a monolithic HR-CMOS sensor chip for the CLIC silicon tracker PoS(TWEPP2018)072 pdf |
Design of a HVCMOS pixel sensor ASIC with on-chip readout electronics for ATLAS ITk Upgrade PoS(TWEPP2018)074 pdf |
Algorithms for Threshold Dispersion Minimization of the CHIPIX65 Asynchronous Front-End PoS(TWEPP2018)076 pdf |
The Quality-Assurance Test of the ATLAS New Small Wheel Read-Out Controller ASIC PoS(TWEPP2018)081 pdf |
A Low-Noise Charge-Sensitive Amplifier for Gainless Charge Readout in High-Pressure Gas TPC PoS(TWEPP2018)083 pdf |
A High Dynamic Range ASIC for Time of Flight PET with monolithic crystals PoS(TWEPP2018)085 pdf |
The Readout and Data Transmission of a Monolithic Active Pixel Sensor prototype for the CEPC Vertex Detector PoS(TWEPP2018)086 pdf |
An Ultra-Fast 10Gb/s 64b66b Data Serialiser Backend in 65nm CMOS Technology PoS(TWEPP2018)088 pdf |
Prototype Front-end ASIC for Silicon-strip Detectors of J-PARC Muon g-2/EDM Experiment PoS(TWEPP2018)090 pdf |
A 28 nm Fast Tracker Front-End for Phase-II Atlas sMDT Detectors PoS(TWEPP2018)091 pdf |
A 130 nm CMOS PLL for Phase-II ATLAS-MDT TDC PoS(TWEPP2018)092 pdf |
A Capacitor DAC for Charge Redistribution Analog to Digital Converter with Successive Approximation PoS(TWEPP2018)094 pdf |
A System-Verilog Verification Environment for the CIC Data Concentrator ASIC of the CMS Outer Tracker Phase-2 Upgrades PoS(TWEPP2018)097 pdf |
A high speed transmitter circuit for the ATLAS/CMS HL-LHC pixel readout chip PoS(TWEPP2018)098 pdf |
A 65 nm Data Concentration ASIC for the CMS Outer Tracker Detector Upgrade at HL-LHC PoS(TWEPP2018)099 pdf |
Trigger |
Serenity: An ATCA prototyping platform for CMS Phase-2 PoS(TWEPP2018)115 pdf |
NaNet: a Reconfigurable PCIe Network Interface Card Architecture for Real-time Distributed Heterogeneous Stream Processing in the NA62 Low Level Trigger. PoS(TWEPP2018)118 pdf |
ALICE trigger system for LHC Run 3 PoS(TWEPP2018)119 pdf |
Radiation Tolerant Components and Systems |
Investigations into the effect of gamma irradiation on the leakage current of 130-nm readout chips for the ATLAS ITk strip detector PoS(TWEPP2018)121 pdf |
Radiation hardness test of the nSYNC ASIC with 60 MeV proton beam PoS(TWEPP2018)124 pdf |
Radiation hard Depleted Monolithic Active Pixel Sensors with high-resistivity substrates PoS(TWEPP2018)125 pdf |
Systems, Planning, Installation, Commissioning and Running Experience |
Operation of the CMS Level-1 Calorimeter Trigger in High Pileup Conditions and Motivations for Phase-2 PoS(TWEPP2018)126 pdf |
Service hybrids for the silicon strip modules of the CMS Phase-2 Outer Tracker upgrade PoS(TWEPP2018)127 pdf |
The Phase-I Trigger Readout Electronics Upgrade of the ATLAS Liquid Argon Calorimeters PoS(TWEPP2018)128 pdf |
Design and development of the DAQ and Timing Hub for CMS Phase-2 PoS(TWEPP2018)129 pdf |
The End-of-Substructure (EoS) card for the Strip Tracker Upgrade of the ATLAS experiment PoS(TWEPP2018)130 pdf |
Status of the Readout Electronics for the Triple-GEM Detectors of the CMS GE1/1 System and Performance of the Slice Test in the 2017-18 LHC Run PoS(TWEPP2018)132 pdf |
Control and Monitoring for a serially powered pixel demonstrator for the ATLAS Phase II upgrade PoS(TWEPP2018)133 pdf |
The VMM front-end integration in the Scalable Readout System: On the way to a next generation readout system for generic detector R&D and experiment instrumentation PoS(TWEPP2018)136 pdf |
The Proton Timing System of the TOTEM experiment at LHC PoS(TWEPP2018)137 pdf |
First performance measurements of the Fast Tracker Real Time Processor at ATLAS PoS(TWEPP2018)138 pdf |
Programmable Logic, Design Tools and Methods |
Upgrade of the CMS Barrel Muon Track Finder for HL-LHC featuring a Kalman Filter algorithm and an ATCA Host Processor with Ultrascale+ FPGAs PoS(TWEPP2018)139 pdf |
FELIX: the New Detector Readout System for the ATLAS Experiment PoS(TWEPP2018)140 pdf |
Improved Tapped-Delay-Line Time-to-Digital Converter with Time-over-Threshold measurement for a new generation of Resistive Plate Chamber detectors PoS(TWEPP2018)141 pdf |
A collaborative HDL management tool for ATLAS L1Calo upgrades PoS(TWEPP2018)142 pdf |
Sorting of STS-XYTER2 data for microslice building for CBM experiment PoS(TWEPP2018)143 pdf |
Production, Testing and Reliability |
Novel production method for large double-sided microstrip detectors of the CBM Silicon Tracking System at FAIR PoS(TWEPP2018)144 pdf |
Test strategy for low failure rates and status of a highly integrated readout chip for PMTs in JUNO PoS(TWEPP2018)145 pdf |
Reliability test results of the interconnect structures of the front-end hybrids for the CMS Phase-2 Tracker Upgrade PoS(TWEPP2018)146 pdf |
Power, Grounding and Shielding |
System level serial powering studies of RD53A chip PoS(TWEPP2018)147 pdf |
Optoelectronics and Links |
Radiation tolerance enhancement of silicon photonics for HEP applications PoS(TWEPP2018)150 pdf |
Next generation of Radiation Tolerant Single-Mode Optical Links for Accelerator Instrumentation PoS(TWEPP2018)151 pdf |
Asic |
Development of the monolithic "MALTA" CMOS sensor for the ATLAS ITK outer pixel layer PoS(TWEPP2018)155 pdf |
Test results of irradiated CMOS pixel circuits in 150 nm CMOS technology for the ATLAS Inner Tracker Upgrade PoS(TWEPP2018)156 pdf |
RD53A: a large scale prototype for HL-LHC silicon pixel detector phase 2 upgrades PoS(TWEPP2018)157 pdf |
Characterization of the first prototype of the Silicon-Strip readout ASIC (SSA) for the CMS Outer-Tracker phase-2 upgrade PoS(TWEPP2018)159 pdf |
PACIFIC: The readout ASIC for the SciFi Tracker of the LHCb detector PoS(TWEPP2018)164 pdf |
Characterization of GEMINI, a 16-channels programmable readout interface for Triple-GEM detectors in 180nm CMOS PoS(TWEPP2018)165 pdf |
Characterization of the MPA prototype, a 65 nm pixel readout ASIC with on-chip quick transverse momentum discrimination capabilities. PoS(TWEPP2018)166 pdf |